The present invention relates to the storing of a bit of information so that the bit can be read non-destructively, and stored in a nonvolatile manner.
Information is stored in memories in many different ways. Some memories are volatile, that is, the information is lost when the power is turned off. The present memory element is intended to compete with non-volatile core memories and plated-wire memories. In a plated wire memory, the information is stored in a permalloy (81-19 nickel-iron) coating which is plated onto a fine wire. In a core memory, the bit of information is stored in a toroid of ferrite material. In neither of these memories can the magnetic elements be integrated photolithographically with the drive electronics and decoders. Thus, these memories require much labor to build and cost is high. plated wire costs between $4.00 and $10.00 per bit. Core costs 1 to 2 cents per bit and it does not have a non-destructive readout. A new memory, the Crosstie Random Access Memory (CRAM) is currently being developed. The present memory element is intended to fit into the CRAM configuration but offer better characteristics.
Previously, the CRAM thin magnetic film was deposited on a silicon chip after the drive electronics, decoders, and amplifiers were fabricated. The permalloy film was etched into shapes which allow a crosstie-Bloch line pair to be generated in a memory element when a "one" was stored, and a "zero" was stored when the crosstie-Bloch line pair is absent.
Two conductors, insulated from each other and the permalloy film were used to generate or annihilate the crosstie-Bloch line pairs. The current in the conductors provided a magnetic field at the memory element which was localized. When a current was present in both conductors, the magnetic fields produced by each added up to a field sufficient to generate or annihilate depending on the polarity. The field produced by one conductor is insufficient to generate or annihilate, or switch the film. This type of addressing is called half-addressing, or half selecting. This is a misnomer however, because in reality two thirds of the switching field is needed in each conductor. With a small statistical distribution present for the currents, and a small statistical distribution allowed in the switching fields, the memory can be workable. The allowed distributions are shown in FIG. 1. The standard deviation, .sigma., for the switching field of the magnetic memory elements must be no larger than 5% of the switching field if acceptable yields are expected in the manufacture of chips. FIG. 1 shows that a .sigma. of 15% is too large even for small memories, because some elements would be written unintentionally by the read field and not written by the write fields. The yield drops off precipitously for a .sigma. larger than 5%. Thus, using the normal crosstie-Bloch line pair for the memory element, it is difficult to consistantly achieve a .sigma. of less than 5%. The Bloch-line memory element of the present invention allows the 5% standard deviation to be much more readily obtained.
Accordingly, it is an object of the present invention to provide a Bloch-line memory element and a nonvolatile RAM memory using a Bloch-line memory element.
Further objects and advantages of the present invention will become apparent as the following description proceeds and features of novelty characterizing the invention will be pointed out with particularity in the claims annexed to and forming a part of the specification.